Integrated Circuits And Methods Group
ICSG college have developed a Master’s Degree Program in Integrated Circuits and Techniques to serve the working professionals of the Austin space. Tailored for 10M16DAF484I6G , the two-12 months program provides the unique opportunity to pursue a master’s diploma whereas persevering with to work full-time. Upon completion of all the program requirements, a pupil is awarded a Grasp of Science in Engineering diploma with a major in Electrical and Computer Engineering and a concentration in Integrated Circuits and Programs. This system is administered by the center for Lifelong Engineering Education (CLEE).
Courses in Regular ECE Program
The ICSG college train programs on the undergraduate and graduate ranges that span all the house of IC design and design methodology.
UNDERGRADUATE
EE338L
Analysis and design of analog built-in circuits; transistor fashions, integrated circuit technologies; format methods; mismatches; simple and advanced current mirrors, single-stage amplifiers; differential-pair amplifiers; frequency response; noise issues; feedback; nonlinear circuits; cascode amplifiers; telescopic and folded-cascode operational amplifiers; two-stage operational amplifiers using state-of-the-artwork EDA/CAD tools for design simulation and structure.
EE360M
DIGITAL Programs DESIGN Utilizing VHDL
Hardware implementation of arithmetic and other algorithmic processes; hardware description languages (VHDL); organization, design, and simulation of digital systems.
EE360R
Computer-AIDED INTEG CIRCUIT DESIGN
Principle and follow of built-in circuit design. Lessons of chip design, chip partitioning, and structure; computer-aided design tools for simulation and bodily design
EE360S
DIGITAL Integrated CIRCUIT DESIGN
Circuit-stage points of steel oxide silicon (MOS) and bipolar built-in circuit applied sciences. Logic gates and latches; propagation delays; circuit simulation fashions.
EE379K
ANALOG ICS FOR COMMUNICATION Methods
System fashions, small-sign circuit analysis, noise and distortion in units and circuits, including relevant metrics; biasing techniques, voltage references, current sources and biasing for low-noise purposes; amplifier design strategies for low noise, variable acquire amplifiers, power amplifiers; built-in mixers; and integrated oscillators.
GRADUATE Programs
EE382M-1
VLSI TESTING
Hardware and software program reliability evaluation of digital programs; testing, design for testability, self-analysis, fault-tolerant logic design, error-detecting and error-correcting codes.
EE382M-10
SYNTHESIS OF DIGITAL Systems
Automatic technology of gate-degree implementations from HDL specifications; optimization of two-stage, multilevel, and sequential circuits for area, speed, and testability.
EE382M-eleven
VERIFICATION OF DIGITAL Techniques
Computerized verification of digital methods; formal fashions and specs, equivalence checking, design verification, temporal logic, BDDs, logical foundations, automata idea, latest developments
EE382M-12
SYSTEM DESIGN METRICS
Analysis of design at chip, board, and system levels; life cycle implications of design choices, together with design for testability results on production and area service; economic and buyer-driven factors
EE382M-14
ANALOG Built-in CIRCUIT DESIGN
Design and implementation of analog integrated circuits (ICs) focusing on transistor-stage design of circuits using the trendy semiconductor fabrication processes, notably CMOS. The blocks and circuit architectures mentioned in this course are the core parts of most integrated methods and important in purposes resembling communications, multimedia, imaging, sensors, and biomedical.
EE382M-2
Reliable COMPUTING
Design strategies for dependable, fault-tolerant, fail-safe and fail-tender methods; fault prognosis and fault avoidance strategies at program and system levels; experimental and business fault-tolerant laptop methods.
EE382M-7
VLSI TESTING:
VLSI I: CMOS know-how; structured digital circuits; VLSI methods; computer-aided design tools and theory for design automation; chip design.
EE382M-8
VLSI II
Microelectronic systems structure; VLSI circuit testing strategies; integration of heterogeneous laptop-aided design instruments; wafer scale integration; advanced excessive-speed circuit design and integration.
Radio Frequency Built-in Circuit Design
Design and evaluation of RF and analog ICs, including a description of noise and distortion in devices and circuits; biasing strategies including voltage references, present sources and biasing for low-noise purposes; amplifier design methods for low noise, variable achieve, high output power and high dynamic vary; built-in mixers and other frequency converters; rectifier circuits; and integrated oscillators for producing fixed and variable frequencies.
CAD DEEP SUB
Overview of the CAD movement; fundamentals of logic synthesis; graph principle and computational complexity; partitioning; floorplanning and placement; world and detailed routing; static timing analysis and delay modeling; timing closure and physical synthesis; noise sources in timing analysis and PD; CAD for manufacturability; statistical timing evaluation and statistical circuit optimization
NANOSCALE IC DESIGN
CMOS technology and design scaling; nanometer transistors and their models; design time power optimization (circuit-stage techniques, structure, interconnect, reminiscence); standby-mode energy optimization (circuits and systems, memory); runtime power optimization (circuits and methods); sources of variability; statistical information assortment and evaluation of variance; statistical circuit simulation and timing evaluation; manufacturability and decision enhancement strategies.
EE382V:
SYSTEM-ON-A-CHIP DESIGN-ICS
Concepts, issues, and means of system-level design of embedded techniques, i.e., hardware-software co-design & co-verification; modeling and specification of an embedded system at a excessive stage of abstraction; use of co-simulation to validate system functionality; evaluation of practical and nonfunctional performance of the system early within the design course of to support design selections; analysis of hardware/software tradeoffs, algorithms, and architectures to optimize the system based on requirements and implementation constraints.
EMBEDDED SYSTEM DESIGN AND MODELING
This course presents state-of-the-artwork methods, instruments and strategies for system-stage design and modeling of full multi-processor programs from specification all the way down to implementation throughout hardware-software boundaries. Utilizing the SpecC language and the System-On-Chip Environment (SCE), we will specify, simulate, analyze, model and design techniques based mostly on examples of typical embedded functions.
VLSI Physical DESIGN AUTOMATION
Fundamentals of physical design, the process of transforming structural representation of a VLSI system into layout illustration. This course focuses on design automation problems including: logic partitioning, floorplanning, placement, global routing, detailed routing, clock and power routing, and new developments in physical synthesis. Optimization methods, resembling graph principle, network circulate, Steiner tree, simulated annealing, generic algorithm, and linear/convex programming are additionally covered.
EE382V
OPTIMIZATION Points IN VLSI CAD
As CMOS scales into deep submicron dimensions, VLSI designs are interconnect-dominated for the overall chip performance, cost, and reliability. The resulting design closure downside has been a key challenge for deep-submicron (DSM) VLSI design automation. Meanwhile, as CMOS continues scaling to 45nm and beyond, energy is turning into a key limiting factor, together with different nanometer physical effects (reminiscent of noise and reliability) and manufacturing constraints. All these make nanometer VLSI designs extremely advanced. Intelligent pc-aided design (CAD) and optimization tools are essential to offering the best total system performance, energy, reliability, and manufacturability.
Courses in Regular ECE Program
The ICSG college train programs on the undergraduate and graduate ranges that span all the house of IC design and design methodology.
UNDERGRADUATE
EE338L
Analysis and design of analog built-in circuits; transistor fashions, integrated circuit technologies; format methods; mismatches; simple and advanced current mirrors, single-stage amplifiers; differential-pair amplifiers; frequency response; noise issues; feedback; nonlinear circuits; cascode amplifiers; telescopic and folded-cascode operational amplifiers; two-stage operational amplifiers using state-of-the-artwork EDA/CAD tools for design simulation and structure.
EE360M
DIGITAL Programs DESIGN Utilizing VHDL
Hardware implementation of arithmetic and other algorithmic processes; hardware description languages (VHDL); organization, design, and simulation of digital systems.
EE360R
Computer-AIDED INTEG CIRCUIT DESIGN
Principle and follow of built-in circuit design. Lessons of chip design, chip partitioning, and structure; computer-aided design tools for simulation and bodily design
EE360S
DIGITAL Integrated CIRCUIT DESIGN
Circuit-stage points of steel oxide silicon (MOS) and bipolar built-in circuit applied sciences. Logic gates and latches; propagation delays; circuit simulation fashions.
EE379K
ANALOG ICS FOR COMMUNICATION Methods
System fashions, small-sign circuit analysis, noise and distortion in units and circuits, including relevant metrics; biasing techniques, voltage references, current sources and biasing for low-noise purposes; amplifier design strategies for low noise, variable acquire amplifiers, power amplifiers; built-in mixers; and integrated oscillators.
GRADUATE Programs
EE382M-1
VLSI TESTING
Hardware and software program reliability evaluation of digital programs; testing, design for testability, self-analysis, fault-tolerant logic design, error-detecting and error-correcting codes.
EE382M-10
SYNTHESIS OF DIGITAL Systems
Automatic technology of gate-degree implementations from HDL specifications; optimization of two-stage, multilevel, and sequential circuits for area, speed, and testability.
EE382M-eleven
VERIFICATION OF DIGITAL Techniques
Computerized verification of digital methods; formal fashions and specs, equivalence checking, design verification, temporal logic, BDDs, logical foundations, automata idea, latest developments
EE382M-12
SYSTEM DESIGN METRICS
Analysis of design at chip, board, and system levels; life cycle implications of design choices, together with design for testability results on production and area service; economic and buyer-driven factors
EE382M-14
ANALOG Built-in CIRCUIT DESIGN
Design and implementation of analog integrated circuits (ICs) focusing on transistor-stage design of circuits using the trendy semiconductor fabrication processes, notably CMOS. The blocks and circuit architectures mentioned in this course are the core parts of most integrated methods and important in purposes resembling communications, multimedia, imaging, sensors, and biomedical.
EE382M-2
Reliable COMPUTING
Design strategies for dependable, fault-tolerant, fail-safe and fail-tender methods; fault prognosis and fault avoidance strategies at program and system levels; experimental and business fault-tolerant laptop methods.
EE382M-7
VLSI TESTING:
VLSI I: CMOS know-how; structured digital circuits; VLSI methods; computer-aided design tools and theory for design automation; chip design.
EE382M-8
VLSI II
Microelectronic systems structure; VLSI circuit testing strategies; integration of heterogeneous laptop-aided design instruments; wafer scale integration; advanced excessive-speed circuit design and integration.
Radio Frequency Built-in Circuit Design
Design and evaluation of RF and analog ICs, including a description of noise and distortion in devices and circuits; biasing strategies including voltage references, present sources and biasing for low-noise purposes; amplifier design methods for low noise, variable achieve, high output power and high dynamic vary; built-in mixers and other frequency converters; rectifier circuits; and integrated oscillators for producing fixed and variable frequencies.
CAD DEEP SUB
Overview of the CAD movement; fundamentals of logic synthesis; graph principle and computational complexity; partitioning; floorplanning and placement; world and detailed routing; static timing analysis and delay modeling; timing closure and physical synthesis; noise sources in timing analysis and PD; CAD for manufacturability; statistical timing evaluation and statistical circuit optimization
NANOSCALE IC DESIGN
CMOS technology and design scaling; nanometer transistors and their models; design time power optimization (circuit-stage techniques, structure, interconnect, reminiscence); standby-mode energy optimization (circuits and systems, memory); runtime power optimization (circuits and methods); sources of variability; statistical information assortment and evaluation of variance; statistical circuit simulation and timing evaluation; manufacturability and decision enhancement strategies.
EE382V:
SYSTEM-ON-A-CHIP DESIGN-ICS
Concepts, issues, and means of system-level design of embedded techniques, i.e., hardware-software co-design & co-verification; modeling and specification of an embedded system at a excessive stage of abstraction; use of co-simulation to validate system functionality; evaluation of practical and nonfunctional performance of the system early within the design course of to support design selections; analysis of hardware/software tradeoffs, algorithms, and architectures to optimize the system based on requirements and implementation constraints.
EMBEDDED SYSTEM DESIGN AND MODELING
This course presents state-of-the-artwork methods, instruments and strategies for system-stage design and modeling of full multi-processor programs from specification all the way down to implementation throughout hardware-software boundaries. Utilizing the SpecC language and the System-On-Chip Environment (SCE), we will specify, simulate, analyze, model and design techniques based mostly on examples of typical embedded functions.
VLSI Physical DESIGN AUTOMATION
Fundamentals of physical design, the process of transforming structural representation of a VLSI system into layout illustration. This course focuses on design automation problems including: logic partitioning, floorplanning, placement, global routing, detailed routing, clock and power routing, and new developments in physical synthesis. Optimization methods, resembling graph principle, network circulate, Steiner tree, simulated annealing, generic algorithm, and linear/convex programming are additionally covered.
EE382V
OPTIMIZATION Points IN VLSI CAD
As CMOS scales into deep submicron dimensions, VLSI designs are interconnect-dominated for the overall chip performance, cost, and reliability. The resulting design closure downside has been a key challenge for deep-submicron (DSM) VLSI design automation. Meanwhile, as CMOS continues scaling to 45nm and beyond, energy is turning into a key limiting factor, together with different nanometer physical effects (reminiscent of noise and reliability) and manufacturing constraints. All these make nanometer VLSI designs extremely advanced. Intelligent pc-aided design (CAD) and optimization tools are essential to offering the best total system performance, energy, reliability, and manufacturability.
Public Last updated: 2022-07-28 05:15:35 PM
